ATPG

AcronymDefinition
ATPGAutomatic Test Pattern Generation
ATPGAutomatic Test Program Generator
References in periodicals archive ?
The huge growth in automotive chip design has prompted a focus on high quality (zero defect) and ISO 26262 compliance, which has led to the rapid adoption of hybrid ATPG compression/LBIST solutions.
Using both compressed ATPG and LBIST together once had the clear drawback of increased chip area for logic test.
Our recent collaboration with Toshiba demonstrates our continuous innovation and investment in new test technologies that addresses our customers' need for shorter manufacturing test time and faster ATPG while their designs complexity continues to grow.
LogicVision to Leverage Magma's Technology to Take ATPG to the Next Level
In an ongoing effort to provide customers with the most comprehensive set of DFT products, LogicVision is developing ATPG and ATPG compression solutions to complement its industry-leading at-speed logic BIST capabilities.
These trends, said Ruiz in a recent phone interview, are driving silicon test costs, impacting ATPG runtimes, and delaying the test of first silicon.
To enhance ATPG performance to meet these challenges, Synopsys has introduced TetraMAX II ATPG, which boosts pattern-generation speed tenfold, cuts required patterns by 25%, and incorporates what Ruiz called production-proven interfaces for scan-rule checking and risk-free deployment.
Synopsys' automotive IC customers worldwide have trusted TetraMAX ATPG to deliver the best test quality and lowest test cost for their most complex designs," said Bijan Kiani, vice president of marketing in Synopsys' Design Group.
ATPG using a tool like Tessent FastScan has been the technique of choice for creating a set of deterministic test patterns for production test.
Regular ATPG has become a less efficient solution because of the amount of patterns required to test complex and large designs; however, embedded test compression technology allows scan test pattern application to be 100 times faster with fewer corresponding tester cycles.
While not an explicit ATPG technique, this method requires configuring pattern generation so that active blocks are only considered during the ATPG process and the remaining blocks are held in a steady state.
Going forward, Mentor's BIST offerings will be based on the former LogicVision platform and the ATPG offerings on Mentor's TestKompress[R] and FastScan[TM] platform.