DPLL

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Acronym	Definition
DPLL	Digital Phase-Locked Loop
DPLL	Davis-Putnam-Logemann-Loveland (search algorithm)
DPLL	Deer Park Little League (Texas)
DPLL	Discrete-Time Phase-Locked Loop
DPLL	Dysimmune and Pseudo-Lymphomatous Lymphadenopathies

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References in periodicals archive	?		Acronyms browser	?		Full browser	?
Stability analysis of an nth power digital phase-locked loop-part I: First-order DPLL," IEEE Transaction Communications, Vol. TDTL based frequency synthesizers with auto sensing technique by Qutayri, Mahmoud Al-; Araji, Saleh Al-; Humaidan, Abdulrahman Al- / International Journal of Communications, Network and Systems Sciences (IJCNS) The device accepts three references and performs hitless reference switching, and the integrated DPLL automatically synchronizes to one of a pre-defined set of standard telecomms frequencies, ranging from 2kHz to 77. Zarlink introduces new single-chip Gigabit Ethernet line card ... by Worldwide Computer Products News The DPLL is the most important part of the timing card. Timing redundancy in telecommunication systems: a white paper by Milijevic, Slobodan / Designfax			DPKBL DPKD DPKG DPKM DPKO DPKOL DPKS DPKSL DPKY DPKY-FC DPL DPL2 DPLA DPLB DPLC DPLD DPLE DPLF DPLG DPLGA DPLI DPLIC DPLII DPLIS DPLK DPLL DPLLGA DPLM DPLN DPLO DPLOA DPLP DPLR DPLRP1 DPLS DPLSA DPLSM DPLSS DPLT DPLU DPLXR DPM DPM&C DPM/g DPMA DPMAS DPMB DPMBP DPMC DPMCA DPMCC			Dpkg DPKM Dpko DPKOL DPKS DPKSL DPKY DPKY-FC DPL DPL DPL DPL-82 DPL2 DPLA DPLB DPLC DPLD DPLE DPLF DPLG DPLGA DPLI DPLIC DPLII DPLIS DPLK DPLL DPLLGA DPLM DPLN DPLO DPLOA DPLP DPLR DPLRP1 DPLS DPLSA DPLSM DPLSS DPLT DPLU DPLXR DPM DPM DPM DPM DPM&C DPM/g DPMA DPMA DPMAS DPMB DPMBP DPMC DPMCA

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