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Mentor's recently announced Questa(TM) verification platform supports the new IEEE 1800 standard by providing design and testbench constructs, assertions,and the Direct Programming Interface (DPI) within a single-kernel solution. SystemVerilog includes design specification methods, an embedded assertions language, a testbench language including coverage and assertions, an Application Programming Interface (API), and a Direct Programming Interface (DPI). Questa SystemVerilog incorporates the key components of the emerging IEEE P1800 SystemVerilog standard -- design constructs, testbench constructs, assertions and the Direct Programming Interface (DPI) -- into a single-kernel verification solution. |
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