model will be available for general release in the HSPICE simulator in March 2005.
The macro modeling HVMOS approach had fundamental limitations in simulation convergence and speed, and posed parameter extraction challenges," said Roberto Tinti, product manager with Agilent's EEsof EDA division.
IC-CAP provides a powerful open and flexible environment for measuring and extracting device models for a broad range of process technologies, including CMOS, HVMOS, BJT, HBT on silicon and compound semiconductors.
In addition to the HiSIM_HV model, the IC-CAP device modeling software platform enables the extraction of other HVMOS device models.
An improved link from IC-CAP to Synopsys' HSPICE simulator facilitates the most efficient extraction of the HVMOS model using an optimized sequence of dedicated extraction steps.
The advanced HVMOS model is another example of how HSPICE continues to deliver innovation for the most accurate simulation solution for complex IC designs," said Paul Lo, senior vice president of Synopsys' Analog Mixed Signal Group.
We are extremely excited to kick off our collaboration with Synopsys by announcing a robust, fast and accurate solution in the area of HV CMOS modeling; especially given that Synopsys' HVMOS model plays such a critical role in answering a real industry need," said Jim McGillivary, vice president and general manager of Agilent's EEsof EDA Division.
The HVMOS model, developed in partnership with Sony (Japan) and Cadence Design Systems (NY:CDN), offers better accuracy to model high-voltage devices such as Flash memory with asymmetric LDD structures and LCD drivers, CCD, E2PROM and LDMOS.
We are pleased to offer the model parameters for HVMOS to our customers, as it should greatly aid them with the simulation of their complex flash memory and power IC designs.