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HPI
(redirected from Host Port Interface)

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AcronymDefinition
HPIHouse Price Index (OFHEO)
HPIHuman Performance Improvement
HPIHistory of Present Illness
HPIHappy Planet Index
HPIHealth Policy Institute
HPIHost Port Interface
HPIHeifer Project International (international family self-reliance program)
HPIHigh-Pressure Injection
HPIHogan Personality Inventory
HPIHuman Performance Institute
HPIHoles per Inch (embroidery)
HPIHobby Products International
HPIHire Purchase Information
HPIHiroshima Peace Institute (Japan)
HPIHydrocarbon Process(ing) Industry
HPIHealth Promotion Institute
HPIHemera Photo-Object Image
HPIHigh-Power Illuminator
HPIHigh Potential Incident (safety)
HPIHigh Probability of Intercept
HPIHolcim Philippines, Inc. (cement manufacturer)
HPIHealth Provider Index (New Zealand)
HPIHazard Potential Index
HPIHorn Plastics, Inc.
HPIHewlett Packard Invent
HPIHall Position Indicator (elevators)
HPIHydrographic Project Instructions
HPIHorizontal Production Integration
HPIHermite Polynomial Interpolant
HPIHuaneng Power International (China)
HPIHealth Promotion International (journal; International Union for Health Promotion and Education)
HPIHindu Press International (Hinduism Today)
HPIHasso Plattner Institute (Germany)
HPIHealth Plans, Inc. (Massachusetts)


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References in periodicals archive?   Acronyms browser?   Full browser?
The first reference platform is a feature-rich hybrid STB design that integrates Qpixel's QL201B onto the motherboard, as a companion to the main STB decoder, connecting gluelessly through its flexible host port interface.
The host port interface of Cypress's EZ-OTG and EZ-Host controllers is used for 16-bit high-performance data transfer.
Intended for evaluation and early prototyping of ST120 based system-on-chip solutions, the ST120-EVA chip integrates the ST120 core with 128Kbyte of program memory and 2x32Kbyte of data memory, a 32-line interrupt controller, two timers, two serial I/O interfaces, a 16-bit GPIO, a host port interface (HPI) and an external memory interface (EMI) that allows external resources to be interfaced to the processor core.
 
 
 
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