LVCMOS

AcronymDefinition
LVCMOSLow Voltage Complementary Metal Oxide Semiconductor
LVCMOSLow-Voltage Complementary Metal-Oxide Semiconductor (family of logic integrated circuits)
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Configurable Outputs: as differential LVPECL/LVDS pair or as a single-ended LVCMOS.
The P3MS650100H and P3MS650103H LVCMOS peak EMI reduction clock generators are ideal for use in PCB space constrained applications such as portable, battery powered devices -including mobile phones and tablets where EMI/RFI can be a significant challenge and compliance with regulations is a prerequisite.
The Si533xx clock buffers provide a single-chip solution that replaces differential LVPECL, LVDS, CML and HCSL buffers with up to 10 outputs, LVCMOS buffers with up to 20 outputs, and discrete muxes, dividers and level translators.
Clock distribution products: Zero-delay buffers and LVCMOS fanout buffers used in servers, routers and switches; temperature-controlled XO (TCXO) fanout buffers for smart phones, tablets and other handheld products; and PCIe buffers for a wide range of PCIe applications.
In addition, the devices are also compatible with many different output types -- from single-ended LVCMOS to differential LVDS -- to support various types of timing systems with a single device, simplifying design and optimizing board layout.
National also expanded its Channel Link II family with two new chipsets for applications that do not require a bidirectional control channel: the DS92LV2421 serializer and DS92LV2422 deserializer, which use a LVCMOS parallel interface; and the DS92LV0421 serializer and DS92LV0422 deserializer, which use a low-voltage differential signaling (LVDS) interface.
The CDCLVC1310 LVCMOS clock buffer delivers an industry-leading phase noise floor of-169 dBc/Hz in crystal mode.
Maximum flexibility: Integration of seven high-performance, programmable outputs offered in LVDS, LVPECL and LVCMOS simplifies timing design.
Eliminating the need for multiple clock generators and/or buffers, the device's outputs support any combination of four differential outputs or up to eight LVCMOS outputs.
The ZL30161 can take any clock from 1Hz to 750MHz and generate up to six LVPECL and six LVCMOS clock outputs.
The new P3MS650100H and P3MS650103H LVCMOS peak EMI reduction clock generators are ideal for use in space constrained applications such as portable, battery powered devices -including mobile phones and tablets where EMI/RFI can be a significant challenge and compliance with regulations is a pre-requisite.