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The availability of Hercules rule files for both design rule checking (DRC) and layout versus schematic (LVS) on this specialized process is the result of close cooperation between the two companies. TSMC has long been providing foundry-qualified design rule check (DRC), layout versus schematic (LVS), and parasitic extraction rule decks qualified for the Mentor Graphics Calibre[R] platform, as well as Spice models for Mentor's Eldo[R] Spice simulator. Specifically, IBM, Chartered and Samsung will offer 65nm designers common design kits that consist of physical verification (design rule checking (DRC) and layout versus schematic (LVS) matching) and parasitic extraction (RCX) technology files. |
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