PLDROPhase-Locked Dielectric Resonator Oscillator
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Factors that could cause or contribute to such differences include, but are not limited to, the ability of Pascall to sell the PLDRO product line for many additional applications; to design and manufacture high performance products with substantial market opportunity and those factors contained in the "Risk Factors" Section of the company's Form 10-K for the year ended December 31, 2005.
The PLDRO search and locking circuit, shown in Figure 3, consists of two feedback paths: a negative feedback path, which is the locking circuit (OPA2-loop filter OPA3 high input impedance buffer), and a sweeping circuit for aided acquisition as the positive feedback (OPA1-Schmitt trigger comparator, OPA2-integrator).
As a result, the PLDRO has the benefit of a lower noise floor within the loop compared to the usual PLLs.
Additionally (both in a PLDRO and synthesizer), a higher phase detector gain will reduce the noise floor within the loop bandwidth.
Hence, the best phase noise limit of a synthesizer or PLDRO is defined by the free-running VCO or Vt-DRO phase noise characteristic.
3 GHz low cost PLDRO example for a local multipoint distribution system application is shown in Figures 7, 8, 9 and 10.
When compared to competing higher cost phase-locked permanent magnet YIG oscillators, PLDROs have lower power consumption and good temperature stability.