UARTS

Acronym

Definition

UARTS

Unmanned Air Reconnaissance & Targeting System

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The VS2000 feature set includes a 60 MHz 32-bit Lightfoot RISC CPU core, 10/100 Ethernet MAC with a 4KB frame buffer SRAM, external memory controller with 32MB addressing range, configurable 8- or 32-bit external memory bus, glueless interface including four individually-programmed chip selects, two cache controllers, two UARTS, three SPI ports, watchdog timer, real-time clock and interrupt controller. Velocity Semiconductor debuts first in series of mixed-language ... by EDP Weekly's IT Monitor 3v, this device offers two NS16C550 high speed UARTS (Universal Asynchronous Receiver Transmitter) with send/receive 16 Byte FIFOs, ISA host interface, general purpose address decoder, multi-mode parallel port with ChiProtect(TM) and EPP/ECP support. SMSC Announces Simple I/O Device For Embedded Applications by Business Wire Other integrated peripherals include two UARTS, two smartcard interfaces, an I2C controller, three PWM outputs, three capture/timers and a Modem Analog Front End interface. STMicroelectronics Announces New Generation Back-End Decoder for DVD ... by Business Wire	UARA UARB UARC UARCC UARCD UAREP UARF UARFCN UARG UARH UARHOF UARI UARK UARL UARLRLR UARM UARNOC UARP UARR UARRP UARRSI UARS UARSSI UART UARTIC UARTS UARV UAS UAS&E UAS1 UAS2 UASA UASB UASBO UASBR UASC UASCD UASCE UASCJ UASCP UASD UASDC UASE UASER UASF UASFAA UASFE UASFLA UASH UASI UASIL	UARHOF UARI UARK UARL UARLRLR UARM UARNOC UARP UARR UARRP UARRSI UARS UARS UARS Airborne Support Equipment UARS Missions UARSSI Uart Uart Uart Uart UART Based Protocol UART Baud Rate Register UART Control Register 1 UART Data Register UART Divisor Latch LSB UART Interrupt Vector Register UART overrun UARTIC UARTS UARV UAS UAS Performance Assessment System UAS&E UAS1 UAS2 UASA UASB UASBO UASBR UASC UASCD UASCE UASCJ UASCP UASD UASDC UASE Uaser UASF UASFAA UASFE UASFLA UASH

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The VS2000 feature set includes a 60 MHz 32-bit Lightfoot RISC CPU core, 10/100 Ethernet MAC with a 4KB frame buffer SRAM, external memory controller with 32MB addressing range, configurable 8- or 32-bit external memory bus, glueless interface including four individually-programmed chip selects, two cache controllers, two UARTS, three SPI ports, watchdog timer, real-time clock and interrupt controller.

Velocity Semiconductor debuts first in series of mixed-language ... by EDP Weekly's IT Monitor

3v, this device offers two NS16C550 high speed UARTS (Universal Asynchronous Receiver Transmitter) with send/receive 16 Byte FIFOs, ISA host interface, general purpose address decoder, multi-mode parallel port with ChiProtect(TM) and EPP/ECP support.

SMSC Announces Simple I/O Device For Embedded Applications by Business Wire

Other integrated peripherals include two UARTS, two smartcard interfaces, an I2C controller, three PWM outputs, three capture/timers and a Modem Analog Front End interface.

STMicroelectronics Announces New Generation Back-End Decoder for DVD ... by Business Wire