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References in periodicals archive ?
When there are other vias nearby, the mutual inductance must also be taken into account (7).
The loop inductance for current going down one of the traces and back the other one is just 32 pH/mil times the spacing between the traces and times the ratio of the length to the width of the strips.
The golden rule in reducing the total inductance of the ground path is to decrease the number of field line loops coming from its own current and increase the number of field line loops coming from the signal path current.
For example, for a 50 [ohms] line that has a time delay of 1 nsec, the loop inductance of the signal return path loop is 1 nsec x 50 [ohms] = 50 nH.
With a coupled inductor topology, all of the inductors are integrated on the same magnetic core and the interaction of the magnetic fields from each phase enables the use of a lower equivalent inductance for faster transient response without increasing the current ripple per phase.
Lower inductance improves current-handling capability Increasing the rated current for power modules involves reducing the internal inductance to counter the higher surge voltages generated during switching.
On display in its 6x12 and 2x4 variations, the new HYBRIFLEX low-inductance cable features a special type of wiring to reduce overall cable inductance, solving the problem of Remote Radio Head (RRH) power-cycling during peak traffic hours due to voltage swings.
The reason is that the inductance of the mounted capacitor is the limiting factor for its performance, and capacitors with smaller bodies have lower inductance.
Abstract: This paper describes a possibility for estimation of the rotor position in low speed of interior permanent synchronous motor (IPMSM) The IPMSM has salient rotor, this means the stator inductance changes depending on the current position of the rotor, so information about rotor position is contained in changes of stator inductance.
For example, to provide charge to an IC capacitors must be connected from the proper power plane to the ground plane and be placed close to the IC power/ground pins to minimize distance inductance.