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References in periodicals archive ?
Writing a custom boundary scan test. Although the ATPG enables automatic generation of required boundary scan tests, there are cases when a test needs to be manually created.
"The combination of SSP's expertise in developing test applications, together with the extensive boundary scan test capabilities of the x1149, have resulted in improved test coverage," said NK Chari, director of marketing and support from Keysight's Measurement Systems Division.
* Boundary scan connect test: Boundary scan test for pins not connected to any device and that have testpoints.
Several considerations must be kept in mind to ensure design-for-test guidelines are followed during the board design phase to avoid hiccups during boundary scan tests for these boards.
* Boundary scan test vectors can be embedded on the PEC for reuse as part of BIST.
Innovative boundary scan test extensions increase test coverage to components connected to the SoC.
The objective is to standardize both the description of and access to these instruments in the same way that 1149.1 standardized boundary scan test. Companies with JTAG expertise, such as Intellitech and ASSET InterTech, have been instrumental in defining PI 687 and provide test tools for its use.
Boundary scan or, more accurately, the IEEE 1149.1 Standard Boundary Scan Test Strategy, traces its roots to the mid 1980s.
With no prior knowledge of JTAG test, Asset InterTech's ScanWorks[R] boundary scan test application environment can be easily and quickly integrated into custom test executives developed with tools such as National Instruments' (NI) LabView and TestStand.
Below are the following IEEE standards and boundary scan test system features that enable test engineers to recover manufacturing test (FIGURE 2):
Tools and applications have improved tremendously to ease boundary scan test implementation.
The ScanWorks bundle is cost-sensitive for fast-moving small and medium size companies that need to implement boundary scan test technology.