CAMMUCache Memory Management Unit
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The low order eight pages of the supervisor address are permanently mapped by the CAMMU to provides access to Boot ROM (residing on the system bus), I/O, which is addressed via reads and writes to memory addresses, and low main memory.
In each case, the CAMMU recognizes the exception and maintains copies of the protection bits taken from the page table entries in the TLB.
The Instruction CAMMU contains its own instruction counter, and will feed the next 4 bytes of the instruction stream into the instruction buffer every time the next instruction line of the instruction bus is clocked.