Number of CPU Memory steps Time (s) (MB) leapfrog 1 2000 25 3.
When CPW = 20 and CFLN = 1, 5, the information on the controlling parameters of the efficient 4-stages SS-FDTD_1 method and the efficient 4-stages SS-FDTD_2 method are shown in Table 3.
Figures 1 and 2 show the normalized numerical phase velocity and normalized numerical phase velocity error (NNPVE) versus [phi] with CPW = 20 and CFLN = 1, 5 for seven kinds of FDTD methods, respectively.
The computed results computed by the LN-ADI-FDTD method as CFLN varying from 0.
From Table 1, when CFLN increases, the average relative error becomes larger; however the CPU time is reduced.
Becoming there the object of a bitter and sustained campaign calling for his indictment and trial, he was arrested in August 1943 on the orders of the CFLN.
At the same time, and also highly important, while paying tribute to several groups of Resistants, including the PCF, the pamphlet was far from giving the latter the inordinate, exclusive attention, and thus publicity, which de Gaulle and the CFLN would have found undesirable.
At CFLN = 10, for N = 4 the dispersion is approximately 130% better than the proposed algorithm for N = 1.
Besides, the CFLN adopted in the proposed scheme is larger than the existing US-FDTD, whereas the computation efficiency are not improved evidently.
The time step, on the other hand is chosen at CFLN
z]-field at the observation point for the ADI-FDTD and four-step ADI-FDTD methods with CFLN
= 5 and CPW = 20, the processes of controlling parameters of the E-SSCN6-FDTD method are shown as in Table 2.