HCSLHigh-Speed Current Steering Logic (clock oscillators)
HCSLHarford County Soccer League (Maryland)
HCSLHellenic Complex Systems Laboratory (est. 1993; Greece)
HCSLHost Clock Signal Level
HCSLHealth Care Systems Leadership Retreat (American Hospital Association)
References in periodicals archive ?
HSCL Descriptive Statistics and Correlations Intercorrelations and Descriptives HSCL Variables HSCL Total Depression HCSL Anxiety HSCL total -- r = .
The Si533xx clock buffers provide a single-chip solution that replaces differential LVPECL, LVDS, CML and HCSL buffers with up to 10 outputs, LVCMOS buffers with up to 20 outputs, and discrete muxes, dividers and level translators.
For even greater flexibility, each output differential pair can independently be used as LVPECL, LVDS, HCSL, or two CMOS.
The DSC21XX and DSC22XX oscillators support a variety of single and dual output CMOS, LVPECL, LVDS, and HCSL configurations.
Epson also intends to address the diverse range of differential output formats used in networking equipment through the gradual release of new products supporting HCSL and LVDS standards.
The 5P49V5901 s four universal output pairs are each independently configurable as HCSL, LVPECL, LVDS, or dual LVCMOS outputs.
The DSC20XX family of CMOS, LVPECL, LVDS, and HCSL oscillators allows engineers to optimize complex and costly multi-oscillator designs without sacrificing performance and flexibility.
To accommodate a variety of systems, Epson offers the new MG-7050 MOSOs in 2- and 4-output configurations and three output types: LV-PECL, LVDS, and HCSL.
The DSC11XX are the highest performance silicon-based oscillators to enter production, with 300 femtosecond RMS phase jitter in CMOS, LVPECL, LVDS, and HCSL output versions.
Moreover, to give designers even greater options, the new VersaClock devices can generate frequencies from 5kHz to 500MHz and are also compatible with many different output types -- from single-ended LVCMOS to differential LVDS, LVPECL and HCSL -- to support all timing systems in a single device.
3V) and signal format (LVPECL, LVDS, CMOS, HCSL, SSTL, HSTL), eliminating the need for external level translators and thereby reducing BOM cost and complexity.