HSYNCHorizontal Sync
HSYNCHorizontal Synchronization
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References in periodicals archive ?
During the conversion process, column and row information for each pixel is extracted from the two synchronization signals (Hsync and Vsync) [13].
The device supports 18-/16-/6-bit RGB (DCLK, VSYNC, HSYNC, DE) and Intel/Motorola MPU 18-/16-/9-/8-bit bus interfaces.