HVMOS

AcronymDefinition
HVMOSHigh-Voltage Metal-Oxide Semiconductor
References in periodicals archive ?
The NanoSim simulator has long been accepted as the industry standard for simulating complex integrated circuit designs, and our innovative HVMOS modeling is addressing application-specific IC designs such as flat-panel LCDs," said George Zafiropoulos, vice president of marketing for verification products at Synopsys.
Synopsys' HVMOS device model is currently available in the HSPICE and NanoSim simulators, as well as in the Aurora (TM) model parameter extraction tool.
The HVMOS model will be available for general release in the HSPICE simulator in March 2005.
The macro modeling HVMOS approach had fundamental limitations in simulation convergence and speed, and posed parameter extraction challenges," said Roberto Tinti, product manager with Agilent's EEsof EDA division.
IC-CAP provides a powerful open and flexible environment for measuring and extracting device models for a broad range of process technologies, including CMOS, HVMOS, BJT, HBT on silicon and compound semiconductors.
In addition to the HiSIM_HV model, the IC-CAP device modeling software platform enables the extraction of other HVMOS device models.
The superior accuracy and speed of parameter extraction that this new HVMOS model offers is the reason why we have seen increased adoption by major IDM and foundry customers since the model's introduction six months ago.
Synopsys' HVMOS transistor model is currently available in the HSPICE simulator, as well as in the Aurora(TM) model parameter extraction tool.
An improved link from IC-CAP to Synopsys' HSPICE simulator facilitates the most efficient extraction of the HVMOS model using an optimized sequence of dedicated extraction steps.
The advanced HVMOS model is another example of how HSPICE continues to deliver innovation for the most accurate simulation solution for complex IC designs," said Paul Lo, senior vice president of Synopsys' Analog Mixed Signal Group.
The HVMOS model, developed in partnership with Sony (Japan) and Cadence Design Systems (NY:CDN), offers better accuracy to model high-voltage devices such as Flash memory with asymmetric LDD structures and LCD drivers, CCD, E2PROM and LDMOS.
We are pleased to offer the model parameters for HVMOS to our customers, as it should greatly aid them with the simulation of their complex flash memory and power IC designs.