KBYTE


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AcronymDefinition
KBYTEKilobyte
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This is due to the 80 kBytes (50 kByte and 30 kByte banks) of on-chip RAM used along with the instruction and data caches built into the processing core.
Figure 7 gives the performance of the bullet server for tests made with files of 1 Kbyte, 16 Kbytes, and 1 Mbyte.
The 16 Kbytes of display memory in the NK-DOS 02 system is used for direct storage of the Chinese and ASCII character bit maps.
Fully compliant with the EtherCAT standard and interoperable with all EtherCAT systems, the LAN9252 EtherCAT slave controller includes 4 Kbytes of Dual-Port RAM (DPRAM) and three Fieldbus Memory Management Units (FMMUs).
Fully compliant with the EtherCAT standard and interoperable with all EtherCAT systems, the LAN9252 EtherCAT slave controller includes four Kbytes of Dual-Port RAM (DPRAM) and three Fieldbus Memory Management Units (FMMUs).
For example, this enables indexing of an array with a larger size than 64 Kbytes.
Ralluff (Florence, KY) has announced a new generation of data carriers with a memory of up to 128 kBytes. These drives work up to eight times as fast as the standard ISO 15693, making them the ideal choice for track-and-trace applications with high data volumes such as those used in assembly lines in the automotive industry.
1: How much data, in kbytes or Mbytes per month, will each remote terminal transmit and receive?
Part number TMPV7506XBG TMPV7504XBG CPU core Toshiba original 32-bit RISC CPU Media Embedded Processor (MeP) Image recognition engine Toshiba original multi-core media processor "Venezia" (incorporating " MPE " x 4) Image processing accelerators Affine transform 1ch Filter 2ch Histogram 1ch Histogram of oriented gradient (HOG) 1ch - Matching 1ch On-chip ROM/RAM Mask ROM: 64 Kbytes SRAM: 2080 Kbytes On-chip peripheral functions Video input I/F 4ch 2ch Video output I/F 1ch Main memory controllers DDR2 SDRAM controller NOR Flash/SRAM controller PCI Express 1 lane - CAN controller 3ch I2C I/F 4ch UART I/F 5ch SPI I/F 4ch PCM I/F 2ch Timer 11ch Power supply voltage Core: 1.1 V, I/O: 3.3 V and 1.8 V Operating frequency Max.
Beyond offering pin-to-pin and software compatible with the high-performance F2 series, the F4 series operates at a higher frequency (168 MHz instead of 120 MHz), offers single-cycle DSP instruction support and a Floating Point Unit, larger SRAM (192 Kbytes vs.
It can also be chosen the other two derivative circuits, 83C552 with 8 kbytes mask programmable ROM or 87C552 with 8 kbytes EPROM, but 80C552 is cheaper.
128 Kbytes of non-volatile Ram and eight Mbytes of Flash Ram (for Permanent Alternate Protected Access Boot Site) are standard.