LVTTL

AcronymDefinition
LVTTLLow Voltage Transistor to Transistor Logic
LVTTLLow Voltage Transistor Transistor Logic (AMCC)
Copyright 1988-2018 AcronymFinder.com, All rights reserved.
References in periodicals archive ?
The company's low-EMI CTL[TM] technology is used to reduce 24 or 12 parallel LVTTL signals typically required in ultra-portables to a single differential serial signal.
The IA-2662-E Digital I/O controller includes 48 input channels that are capable of handling 3.3V LVTTL signals, 5V TTL signals and up to 32VDC signals, user definable.
It is rapidly replacing legacy TTL and LVTTL technologies that use a single conductor path, versus two for LVDS.
IDT's 2528 zero delay buffers offer ten outputs, up to seven of which may be configured for 2.5- or 3.3-volt LVTTL, making them ideal for current systems that require multiple clock sources to enable communication between devices of differing voltages.
An enhanced system interface on the RM7000C and RM7065C provides compatibility with legacy system controllers (LVTTL levels: 2.5 or 3.3 voltage) to increase speeds up to 133 MHz, as well as next generation controllers (HSTL level: 1.5 voltage) for speeds up to 200 MHz.
Features include a 300 K gate-programmable FPGA and 64 user-defined, bi-directional, single-ended or differential I/O lines with each signal presenting the option of driving or receiving LVDS, LVTTL, CMOS, and other levels with on board network termination.
Furthermore, the new module includes 16-ch Isolated Digital Inputs, powered already, and capable of handling “Dry-Contact” Inputs, PNP and NPN devices, as well as TTL and LVTTL.
Technologies such as low-voltage TTL (LVTTL) first pushed speeds to the vicinity of 100 MHz but brought challenges in terms of the inability to drive the typically long cables that connect the test equipment to the UUT.
Both the reference input and the universal fan-out buffers can support a wide variety of popular single-ended and differential logic standards (LVCMOS, LVTTL, HSTL, SSTL, LVDS, LVPECL) at a variety of voltage levels.
More recent designs first moved to lower voltages with single-ended logic and families such as LVTTL. To drive longer distances and attain data rates above 100 MHz, the use of differential logic, LVDS in particular, has become almost ubiquitous.