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Other integrated features include: a CIP called Peripheral Touch Controller (PTC); Event System for peripheral co-operation; custom programmable logic blocks; self-programming for firmware upgrades; non-volatile data storage; 20 MHz internal oscillator; high-speed serial communication with USART; operating voltages ranging from 1.8 V to 5.5 V; 10-bit ADC with internal voltage references; and sleep currents at less than 100 nA in power down mode with SRAM retention.
With operating system support for iOS, Android and Windows, the SM-T400i also boasts a configurable Eco-Friendly Auto Power Down mode. Dust protected and splash-proof resistant (IP54 Certified), the SM-T400i is suitable for any environment.
Once in a power down mode, several components of the microprocessor can still respond to system interrupts.
-- Dual wavelength 650 and 780nm -- 55MHz data channel bandwidth (-1db point) -- Selectable gain and Power Down Mode -- 16-pin clear mold flatpack (CFP) package
For example, the power consumption of the 20.7-by-13.8mm chip is less than 50mW during readout, less than 10mW in standby mode, and less than 100[mu]W in power down mode. Again, as with all CMOS chips, the X3 sensor has substantially greater resistance to specular highlight "blooming" than CCD sensors.
The design incorporates an internal 90 [degrees] phase shifter, a power down mode, and full interstage access between the modulator and mixer that permits the addition of IF filtering and gain control.
A power down mode permits idle current in the range of 1 mA in order to maximize battery life.
The device also includes an optional Tx LO buffer amplifier and both LNA gain and power down modes are digitally controlled.
Both clock generators can be used for peripherals in various power down modes to conserve power.
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