QADCQueued Analog-to-Digital Converter
QADCQueensland Anti-Discrimination Commission (Australia)
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Next Generation MPC5500 Family Features - PowerPC ISA compatible Book e - e500 core - Up to 300 MHz core speed - Up to 4 MB embedded Flash memory - Up to 128KB embedded SRAM memory - MMU (Memory Management Unit) - SIMD (Single Instruction Multiple Data) Unit for DSP functionality - eTPU (Enhanced Time Processor Unit) with increased time base width from 16 bits to 24 bits and increased number of channels - Superfast QADC -- for multiple ADC readings without any CPU intervention - DMA (Direct Memory Access) controller - a first
The MPC565 MCU integrates peripherals such as Timer Processor Units (TPUs), QADCs, 1.