Engine[TM] technology supports a wide range of protocols, and it operates independently from the core processor.
The board takes advantage of the large variety of Power QUICC
I/O capabilities by routing the I/O lines directly to front or rear panel connectors.
CoreNet and QUICC
Engine are trademarks of Freescale Semiconductor, Inc.
Engine is a trademark of Freescale Semiconductor, Inc.
Freescale's new QorIQ P1012 and P1021 processors deliver highly efficient multiprotocol processing by integrating the latest QUICC
Engine technology alongside one or two 800 MHz cores based on Power Architecture[R] technology.
And the QUICC
Engine block's enhanced interworking is designed to ease the transition from ATM to IP-based systems while reducing investment costs.
Optimized binaries of these protocol stacks may be obtained from Freescale Open QUICC
Engine[TM] partners including IndusRAD, Inc.
Engine[TM] technology enables network termination, and the AMC platform supports a variety of interface technologies including the Gigabit, Serial I/O and Rapid IO[TM] interconnect standards.
Compatible with previous generation PowerQUICC offerings, Freescale's MPC8568E and MPC8567E processors offer a Gigahertz CPU core, flexible QUICC
Engine technology and high-speed system interfaces for multiprotocol interworking.
The MPC8323E family features a streamlined version of QUICC
Engine(TM) technology containing a single 32-bit RISC engine optimized for residential and SOHO gateways.
The protocol is planned to be available for Freescale processors with QUICC
Engine(TM) technology, such as the MPC8360E PowerQUICC II Pro family.
PowerQUICC(TM) processor with QUICC
Engine(TM) technology addresses challenge of circuit/service emulation over packet-based access networks