SGMIISerial Gigabit Media Independent Interface
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The AQR105 features flexible system interfaces including full KR (with auto- negotiation)/XFI/RXAUI/XAUI/2500BASE-X and SGMII.
These additional 4 ports can be either SGMII, fiber or copper ports if PHYs are added to the front end board.
With this exceptional flexibility, the Hydra core supports a number of standards and data rates including, but not limited to Gigabit Ethernet, SGMII, XAUI, CX-4, Serial RIO, Parallel RIO, SFI4.1, SPI4.2, SPI5, and HyperTransport.
Ideally suited for L2 to L4 switch design, the IEEE 802.3-compliant DP83864 interfaces directly to the media access controller (MAC) layer through either a MII, GMII, RGMII, or SGMII interface.
Additional features include an integrated 1.25 Gbps SERDES channel to support fiber connections and high-speed serial MAC interfaces; support for the popular MAC interfaces (MII, GMII, RGMII, SGMII, TBI, RTBI and SERDES), providing flexibility to connect to different companion chips, and an advanced cable diagnostics function identifies poor quality cable, cable length and location of breaks.
The family of GPON ONU SFP transceiver products is based on the ITU-G.984.2, G.988, and the Broadband Forum TR-156 standards, and offers full GPON OMCI stack, an SGMII interface operating at 1Gbit/s or 2.5Gbit/s, and full digital diagnostics monitoring capability.
It also supports the reduced pin count serial GMII (SGMII) interface with eight pins per port.