SRAM


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AcronymDefinition
SRAMStatic Random Access Memory
SRAMScientific Review of Alternative Medicine
SRAMShadow Random Access Memory
SRAMService Régional d'Admission de Montréal (Quebec)
SRAMshort-range air-to-surface attack missile (US DoD)
SRAMSystem Replacement and Modernization
SRAMSideways Random Access Memory (1980s Acorn BBC RAM expansion)
SRAMStatic read-write Random Access Memory
References in periodicals archive ?
The product has been designed as a drop-in replacement for standard asynchronous SRAMs and is targeted for systems that collect and store data where power levels can vary or be lost suddenly, such as set-top boxes, automotive telematics and industrial applications.
Advantages of embedded SRAM over standalone chips include high density, high speed, lower power, and single port, dual or multi-port access.
Consolidation is on the rise in the SRAM market and companies are constantly improving their market share through mergers and acquisitions.
7 Global SRAM Market Analysis On The Basis Of Products 2005-2020
The innovation is of considerable significance because SRAM is an essential on-chip function for SoCs and MPUs used in embedded control applications.
As LSI fabrication processes become finer, the increasing miniaturization causes greater variations of transistor characteristics, especially threshold voltage (Vth), which can disrupt SRAM operation.
Endorsed by IEEE Spectrum Magazine in January 2007 as one of five 'winning' technologies, ISi's Z-RAM[R] memory offers double the density of embedded DRAM and is up to five times denser than embedded SRAM, making it the world's lowest-cost semiconductor memory solution.
Second and third, two types of assist circuits are added to the SRAM array.
It can destabilize the operation of an embedded SRAM, which in turn can result in erratic system operation or even system failure.
Since data does not have to go off-chip and 1024 bits are programmed in each cycle (compared with 16 for other Flash approaches), power is significantly lower compared to systems that utilize separate chips for Flash and SRAM.
Programming of the Flash is performed through SRAM in parallel, using 1024 bits at a time.