Both devices have large 2Gbytes DDR3 memory bank and a 20Gbaud SRIO
link to the VPX backplane.
and PCIe are the most commonly used fabric protocols for the data plane.
With RMS phase jitter less than 500 fsec over the full 12 kHz to 20 MHz integration range, the new devices meet the stringent jitter and phase noise requirements of applications and standards such as 10G Ethernet, enterprise storage SAS and SATA, PCI Express Gen 1/2/3, XAUI, SRIO
, stringent PHY reference clocks and the newest generations of high-end FPGAs all while operating at about half the core power of competing devices.
The Ensemble SFM3010, an advanced multi-plane switching module, supports a low-latency, deterministic SRIO
fabric data plane, a GigE switching control plane and an IPMI-based system management plane, enabling very sophisticated applications in the small 3U form factor.
This combination of flexible software, high-performance DSP technology and rich device peripherals including dual 4x SRIO
, 4x PCIe and dual GE allows for the creation of flexible, high-quality system solutions.
The combination of CPRI, OBSAI and SRIO
will provide the end customer with a complete end to end wireless SerDes connectivity solution.