SRIO

AcronymDefinition
SRIOSecretario
SRIOSerial RapidIO (BittWare high speed serial interface technology)
SRIOSwedish Roots in Oregon (est. 1999)
References in periodicals archive ?
Both devices have large 2Gbytes DDR3 memory bank and a 20Gbaud SRIO link to the VPX backplane.
Each device has its own large 2Gbytes DDR3 memory bank and a 20Gbaud SRIO link to the VPX backplane.
0 merges seamlessly with TI's Code Composer Studio (TM) integrated development environment and DSP/BIOS (TM) kernel, providing immediate access to the Multicore Associations standard Multicore Communications API (MCAPI), for C66x developers as well as rapid setup of the EDMA3, and SRIO hardware accelerators.
The combination of CPRI, OBSAI and SRIO will provide the end customer with a complete end to end wireless SerDes connectivity solution.
The module's IDT CPS-1848 Gen2 SRIO switch provides a 20Gbps per port Serial RapidIO infrastructure, which enables fast data transfer between DSPs and the FPGA - both on-board and off-board between multiple modules.
Poly-Platform provides instant MCAPI for C66x developers and allows rapid setup and use of the EDMA3, and SRIO hardware accelerators.
With built-in Ethernet, SRIO and antenna switching capabilities, the TCI6636 delivers further system level savings in power consumption and BoM costs.
The module provides a Xilinx Virtex-6 LX240T FPGA, and an IDT CPS-1848 Gen2 SRIO switch provides a 20Gbps per port Serial RapidIO (SRIO) infrastructure.
Both modules include an IDT CPS-1848 Gen2 SRIO switch, which provides a 20Gbps per port Serial RapidIO infrastructure.
Furthermore, Poly-Platform's EDMA3 and SRIO support, provides rapid access to these devices, reducing the developers task from a programming to a configuration effort, and enables MCAPI applications across TI's cores and solutions.