SSTL2

AcronymDefinition
SSTL2Stub Series Terminated Logic for 2.5v
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References in periodicals archive ?
Second, and somewhat surprisingly, the slew rate is significantly affected by varying the characteristic impedance thereby verifying that DDR SDAM can be used in widely varying board technologies as stated in the scope of the SSTL2 standard (1).
PMC-Sierra's system-on-chip devices demonstrate the highest levels of integration using CMOS technologies, supporting multiple 3.125 Gbit/s Serial Links, SSTL2 interfaces, more than 12 Mbit of embedded SRAM, RISC Cores and greater than 4 Million logic gates on a single chip.