Thus, a fifth order TS expansion (TS-5) was used in order to achieve convergence of the TSTF in this study.
The unit was designed using VHDL in order to implement TSTF on FPGA using the Elliott-93 approach.
The block diagram of the unit designed using the Elliott-2 approach for the TSTF on FPGA is shown in Figure 6.
Another approach that ensure the calculation of TSTF on FPGA is the COordinate Rotation DIgital Computer (CORDIC) and LUT-based approach.
Performance of FPGA-based TSTF approximations and chip statistics
According to the results obtained, the CORDIC-LUT-based TSTF unit achieved the closest convergence with the real values.
Four different FPGA-based TSTF designs were synthesized using the Xilinx ISE 14.1 DTS for the Virtex-6.
The TanSig transfer function (TSTF), a nonlinear transfer function used in ANN applications, was coded in VHDL so as to be studied on FPGA using four different approaches.
MSE, RMSE, MAE AND MAPE ANALYSES OF FPGA-BASED TSTF DESIGNS TSTF Structure MSE RMSE MAE MAPE Elliott-93 0.046891 0.216543 0.201963 0.295233 Elliott-2 0.016916 0.130063 0.099109 0.189652 TS-5 based 0.901116 0.949271 0.496668 0.574049 CORDIC-LUT 1.87E-11 4.33 E-06 1.81 E-06 0.076925 CORDIC  2.84E-05 5.33E-03 -- -- PMFEP  5.14E-05 7.17E-03 -- -- TABLE II.
and he every man is the arbiter of his own virtues but let no man prescribe for another mans wellbeing and i temporary and he was the saddest word of all...." (TSTF 204-05).
`You sent playing a joke on the old rigger, is you?"' But,just as quickly, the Deacon's charade returns, and "Roskus was gone" (TSTF 113-14).
When I first came East I kept thinking You've got to remember to think of them as colored people, not riggers...." (TSTF 98).